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4027 Dual JK flip flop with Set and Clear


Product Details

  • Fully static operation
  • 5 V, 10 V, and 15 V parametric ratings
  • Standardized symmetrical output characteristics
  • Specified from -40 °C to +85 °C
  • Complies with JEDEC standard JESD 13-B

35.00

JK flip flop Basics

  • CD4027BMS is a single monolithic chip integrated circuit.
  • It contains two identical complementary-symmetry J-K master-slave flip-flops.
  • Inputs of each flip-flop: – J, K, Set, Reset, and Clock input signals.
  • The output of each flip-flop: – Buffered Q and Q signals.
  • This input-output arrangement provides for compatible operation with the CD4013B dual D type flip-flop.
  • The CD4027BMS performs: – control, register, and toggle functions.

4027 IC Features

  • Fully static operation
  • 5 V, 10 V, and 15 V parametric ratings
  • Standardized symmetrical output characteristics
  • Specified from -40 °C to +85 °C
  • Complies with JEDEC standard JESD 13-B