4027 Dual J-K flip-flop with Set And Clear
- CD4027BMS is a single monolithic chip integrated circuit.
- It contains two identical complementary-symmetry J-K master-slave flip-flops.
- Inputs of each flip-flop: – J, K, Set, Reset, and Clock input signals.
- The output of each flip-flop: – Buffered Q and Q signals.
- This input-output arrangement provides for compatible operation with the CD4013B dual D type flip-flop.
- The CD4027BMS performs: – control, register, and toggle functions.
4027 Dual J-K flip-flop with Set And Clear Features
- Fully static operation
- 5 V, 10 V, and 15 V parametric ratings
- Standardized symmetrical output characteristics
- Specified from -40 °C to +85 °C
- Complies with JEDEC standard JESD 13-B